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UID:103-409@gi.de
CLASS: PUBLIC
SUMMARY:FG-FERS: 14. Workshop on Dependability and Fault Tolerance
DESCRIPTION:Although the basic reliability of hardware and software compone
 nts has\n\nimproved over decades, their increasing number causes severe pro
 blems.\n\nMoreover, in recent years it can be observed that in an increasin
 g\n\nnumber of devices, e.g. cars, digital components are integrated into\n
 \nenvironments of other physical components. Here, the complexity and\n\nnu
 mber of interactions with these components creates problems with\n\nregard 
 to maintaining a dependable operation of the entire system in\n\ncase of fa
 ults or external disturbances.\n\nWhile this is not a problem with micropro
 cessors there, shrinking\n\nfeature sizes, higher complexity, lower voltage
 s, and higher clock\n\nfrequencies increase the probability of design-, man
 ufacturing-, and\n\noperational faults, making fault tolerance techniques i
 n general purpose\n\nprocessors to be of crucial importance in the future. 
 As simple\n\nsolutions (such as TMR) easily can get too expensive, the abil
 ity to\n\ntrade increased reliability against performance/power overhead wi
 ll\n\nbecome important, resulting in light-weight fault tolerance technique
 s\n\nimplemented in hardware, but controllable from higher software layers.
 \n\n\n\nThis workshop aims at presenting contributions and work-in-progress
  from\n\nthe research area of dependable and fault tolerant computing in or
 der to\n\nbring together scientists working in related fields.
LOCATION:TU Braunschweig
DTSTAMP:20180112T121030Z
DTSTART:20180408T220000Z
DTEND:20180408T220000Z
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