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UID:4118-409@gi.de
CLASS: PUBLIC
SUMMARY:16th Workshop on Dependability and Fault Tolerance
DESCRIPTION:Although the basic reliability of hardware and software compone
 nts has improved over decades, their increasing number causes severe proble
 ms. Moreover, in recent years it can be observed that an increasing number 
 of devices are integrated into environments of other physical components su
 ch as automotive or digital systems. Here, the complexity and number of int
 eractions with these components creates problems with regard to maintaining
  a dependable operation of the entire system in case of faults or external 
 disturbances. While this is not a problem with microprocessors, shrinking f
 eature sizes, higher complexity, lower voltages, and higher clock frequenci
 es increase the probability of design, manufacturing and operational faults
 , making fault tolerance techniques in general purpose processors to be of 
 crucial importance in the future. As simple solutions (such as TMR) can eas
 ily get too expensive, the ability to trade increased reliability against p
 erformance/power overhead will become important, resulting in light-weight 
 fault tolerance techniques implemented in hardware, but controllable from h
 igher software layers.\n\nThis workshop aims at presenting contributions an
 d work-in-progress from the research area of dependable and fault-tolerant 
 computing in order to bring together scientists working in related fields. 
 Topics Contributions on the topic of “Dependable Embedded Systems“ are of p
 articular interest; contributions on general topics of dependability and fa
 ult tolerance are also welcome but not limited to:\n\n• dependable computer
  systems, networks and embedded systems\n\n• dependability of mechatronic s
 ystems\n\n• fault-tolerant systems and system components\n\n• safety-critic
 al applications\n\n• highly available systems\n\n• real-time and performanc
 e guarantees\n\n• testing of hardware and software\n\n• fault detection and
  fault treatment\n\n• failure prediction\n\n• modeling, simulation and eval
 uation of faulttolerant systems\n\n• reliability models for hardware and so
 ftware\n\n• validation and verification\n\n• fault models and fault abstrac
 tion\n\n• fault injection techniques\n\n• on-chip fault-tolerance\n\n• soft
 ware-controlled fault tolerance\n\n• fault-tolerant processor architecture\
 n\n• fault-tolerance in operating systems, storage and database systems\n\n
 The workshop will focus on research presentations as well as brainstorming 
 sessions.\n\nTherefore, two kinds of contributions are welcome:\n\n• resear
 ch papers documenting results of scientific investigations and\n\n• positio
 n papers proposing strategies or discussing open problems.
LOCATION:Virtuell
DTSTAMP:20210322T080109Z
DTSTART:20210607T080000Z
DTEND:20210407T140000Z
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